The present invention relates to selectively solderplated printed circuit boards, and to a method of making such boards by selectively printing solder on the printed circuit of a printed circuit board. The method can be used with single or double sided printed circuit boards, and enables a through connection to be made between the circuits on either face of a double sided printed circuit board.
Prior proposals in relation to printed circuit boards have included U.S. Pat. Nos. 3,819,497 (Grunwald et al), 2,897,409 (Gitto), 3,702,284 (Merkenschlager), and 2,872,391 (Hauser et al).
U.S. Pat. No. 3,819,497 proposes an improved plating process for plating copper particularly onto a copper foil laminate. A plain board of laminated construction having a copper outer laminate is punched to provide through holes, and after cleaning and catalyzation copper is electrolessly deposited over the entire exposed surface of the board including the holes. A circuit pattern is applied in subsequent steps. The board has to be baked at a temperature in excess of 150.degree. F. from 10 mins to 2 hours to give adequate adhesion between the electrolessly plated copper coating and the initial copper-clad board surface. This patent is not concerned with solder-plating the circuit board.
U.S. Pat. No. 2,897,409 describes a process in which through holes are formed in a plain board having an outer copper laminate. The through holes are rendered conductive such as by spraying with colloidal size metal particles. Subsequently the circuit design is masked on the surface and the circuit conductors formed. Solder can be applied by dipping the board in molten solder.
In U.S. Pat. No. 3,702,284 a plain copper-clad board has a first resist material defining the desired conductor pattern printed thereon followed by a second resist material over the whole board surface. Through holes are then formed in the board and a metal layer applied by a metal reduction process on the hole walls, followed by electroplating on these surfaces. The second resist layer can then be removed and the desired circuit pattern subsequently formed. The first resist material may be solder resistant; with such an arrangement solder could be applied to the whole unprotected board areas, such as by dipping.
Finally, U.S. Pat. No. 2,872,391 discloses a similar process to U.S. Pat. No. 3,702,284 in using first and second resist layers, followed by the formation of through holes the surfaces of which are rendered conductive and plated. The second resist is removed and the conductor pattern formed. Solder is now plated over the whole conductor pattern and the holes.
It will be seen that none of the above patents is concerned with the selective electroplating of solder onto small portions of the conductor pattern on the circuit board. Furthermore, all the processes use plain laminated boards as the starting material; they are not applicable to the selective solder plating of circuit boards having the pattern already defined on them.
It is an object of the invention to provide for the electroplating of solder onto circuit boards having the circuit conductors already formed thereon.
It is another object of this invention to provide for the selective electroplating of solder onto desired regions of a circuit board.
It is a further object of the invention to provide such a method of solder deposition which gives a smooth, even finish, and in which the solder can reliably be localised to those areas where it is needed.